[1]孔祥晖,席志红.3阶锁相环路接收机的设计与实现[J].应用科技,2008,35(10):17-19.
 KONG Xiang-hui,XI Zhi-hon.Design and implementation of thirdorder PLL receivers[J].Applied science and technology,2008,35(10):17-19.
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3阶锁相环路接收机的设计与实现
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《应用科技》[ISSN:1009-671X/CN:23-1191/U]

卷:
第35卷
期数:
2008年10期
页码:
17-19
栏目:
现代电子技术
出版日期:
2008-10-05

文章信息/Info

Title:
Design and implementation of thirdorder PLL receivers
文章编号:
1009-671X(2008)10-0017-04
作者:
孔祥晖席志红
哈尔滨工程大学 信息与通信工程学院,黑龙江 哈尔滨 150001
Author(s):
KONG Xiang-huiXI Zhi-hon
College of Information and Communication Engineering, Harbin Engineering University, Harbin 150001,China
关键词:
3阶锁相环频率斜升卡尔曼滤波
Keywords:
third-order phaselocked loop frequency ramp Kalman filtering
分类号:
TP273
文献标志码:
A
摘要:
低阶锁相环跟踪频率斜升信号时产生的稳态相差致使环路失锁,接收机无法锁定载波信号.针对这一问题提出一种具有3个零极点的3阶锁相环路,其产生零稳态相差,对含有多普勒频移的载波信号具有较好的锁定效果.给出3阶锁相环参数设计公式.使用频率预测预置锁相环中心频率使环路快速捕获信号,利用FFT及卡尔曼滤波方法提高频率预测的精度,采用FPGA实现3阶载波接收机.结果显示,3阶PLL可稳定跟踪载波信号.
Abstract:
Due to steady phase error, low order PLL has a trouble in tracking frequency ramp signals, so that the receiver cannot lock carrier signals. This paper proposed a type of thirdorder PLL with three zero poles, hence it had better locking effect on carrier signals with Doppler shift since it generated zero phase errors. The design expressions for thirdorder PLL’s parameters were given. With this method, the central frequency of PLL was used to quickly capture signals. The FFT and Kalman filtering were employed to improve the precision of frequency prediction; and the FPGA was utilized to implement a thirdorder carrier receiver. The research outcome showed that the proposed thirdorder carrier receiver can track carrier signals steadily.

参考文献/References:

[1 BEST R. E. Phase-locked loops design, simulation, and applications[M]. 5版.北京:清华大学出版社,2004. [2]张厥盛,郑继禹,万心平.锁相技术[M].西安:西安电子科技大学出版社,2004. [3]余成波,张 莲,胡晓倩,等. 自动控制原理[M]. 北京:清华大学出版社,2006 [4]王晓湘. 多普勒频率跟踪的四阶加权扩展卡尔曼滤波器[J].北京邮电大学学报,2001,24(1):88-91. [5]宋金秀.数据加密技术在网络安全中的应用研究[D].太原:中北大学,2007.

更新日期/Last Update: 2008-10-27