[1]芮东峰,宗德.基于FPGA的视频拼接系统的硬件设计[J].应用科技,2013,40(06):63-68.[doi:10.3969/j.issn.1009-671X.201304010]
 RUI Dongfeng,ZONG De.The hardware design of video splicing system based on FPGA[J].Applied science and technology,2013,40(06):63-68.[doi:10.3969/j.issn.1009-671X.201304010]
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基于FPGA的视频拼接系统的硬件设计(/HTML)
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《应用科技》[ISSN:1009-671X/CN:23-1191/U]

卷:
第40卷
期数:
2013年06期
页码:
63-68
栏目:
现代电子技术
出版日期:
2013-12-05

文章信息/Info

Title:
The hardware design of video splicing system based on FPGA
文章编号:
1009-671X(2013)06-0063-06
作者:
芮东峰1宗德2
1.哈尔滨铁路局 建设管理处,黑龙江 哈尔滨 150001 2.哈尔滨工程大学 信息与通信工程学院,黑龙江 哈尔滨 150001
Author(s):
RUI Dongfeng ZONG De
1. Construction Management Office, Harbin Railways Bureau, Harbin 150001, China2. College of Information and Communication Engineering, Harbin Engineering University, Harbin 150001, China
关键词:
视频拼接硬件设计DDR2视频图形陈列数字显示接口
Keywords:
video splicing hardware design DDR2 VGA digital visual interface
分类号:
TN79;TN919.8;TN911.7
DOI:
10.3969/j.issn.1009-671X.201304010
文献标志码:
A
摘要:
针对大屏幕视频拼接在物联网、智能交通网等领域中需求越来越大的问题,设计了一套基于FPGA的视频拼接系统.该系统选用Xillinx公司的Spartan-6作为处理器,配备以Micron公司高速DDR2 SDRAM存储芯片,支持高清VGA和DVI接口,提供2个视频输入通道和4个视频拼接输出通道,详细分析了系统组成及功能,并给出系统硬件设计及实现方法.
Abstract:
A video splicing system based on FPGA was designed for growing demand of the large-screen video splicing in the field of Internet of Things,and intelligent transportation networks. The core of the video system with Xilinx’s FPGA-XC6SLX100, equipped with Micron’s high-speed DDR2 SDRAM memory chips, supports high-definition VGA and DVI interface, providing two video input channels and four video output channels. This paper analyzes the composition and function of the system, and gives the specific design and implementation of the hardware.

参考文献/References:

[1]白华斌. 大屏幕拼接墙的现状及发展趋势[J]. 中国多媒体通信, 2010(11): 24-27.
[2]陈浩利. 基于FPGA的超高分辨率视频信号处理系统的研究及实现[D]. 广州:华南理工大学:.
[3]Micron Technology Inc. 512Mb:×4,×8,×16 DDR2 SDRAM Features[EB/OL]. [2012-10-23]. http://www.micron.com/parts/dram/ddr2-sdram/mt47h32m16hr-25e?pc={7BBF7165-1B7B-4D9E-B35A-5D4412F647FD}.
[4]Silicon Image Inc. SiI 1161 PanelLink Receiver[EB/OL]. [2012-10-29]. http://cn.siliconimage.com/cn/products/digital-video-interface/dvi-receivers/sii1161-high performance.html.
[5]蒋兆林. DVI 数字显示接口标准[J]. 电子产品世界, 2001(4): 31.
[6]Intersil Americas Inc. ISL98001 Data Sheet[EB/OL]. [2012-11-03]. http://www.intersil.com/content/intersil/en/products/audiovideo/afes/video-analog-front end/ISL98001-275.html.
[7]Chrontel Inc. CH7301C DVI Transmitter Device[EB/OL]. [2012-11-03]. http://www.chrontel.com/index.php/products/display-interface/ch7301c-dvi-transmitter.

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备注/Memo

备注/Memo:
收稿日期:2013-04-09.    网络出版日期:2013-12-04. 
基金项目:国家自然科学基金资助项目(61102038).
作者简介:芮东峰(1974-), 男,工程师,硕士研究生,主要研究方向:通信与信息系统, E-mail:rdf139@sina.com.
更新日期/Last Update: 2013-12-18