[1]栾文彬,唐丽.高速高效信道化接收机及其 FPGA实现[J].应用科技,2008,35(02):13-16.
 LUANW en-bin,TANG Li.The channelized receiverwith high speed and efficiency and its implementation through FPGA[J].Applied science and technology,2008,35(02):13-16.
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高速高效信道化接收机及其 FPGA实现(/HTML)
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《应用科技》[ISSN:1009-671X/CN:23-1191/U]

卷:
第35卷
期数:
2008年02期
页码:
13-16
栏目:
现代电子技术
出版日期:
2008-02-05

文章信息/Info

Title:
The channelized receiverwith high speed and efficiency and its implementation through FPGA
作者:
栾文彬 唐丽
(哈尔滨工程大学 信息与通信工程学院, 黑龙江 哈尔滨 150001)
Author(s):
LUANW en-bin TANG Li
( College of Information and Communication Engineering, Harbin Engineering University, Harbin 15001, China)
关键词:
信道化 多相滤波 滤波器组 数字下变频 FPGA IP core
Keywords:
channelization polyphase filter filter bank DDC FPGA IP core
文献标志码:
A

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[1]唐宏,赵春晖,张朝柱.一种基于多相滤波器组的信道化接收机设计方法[J].应用科技,2006,33(06):8.
 TANG Hong,ZHAO Chunhu,i ZHANG Chaozhu.A design method of channelized receiver based on poly-phase filter banks[J].Applied science and technology,2006,33(02):8.
[2]袁兵华,张文旭,钟晓康,等.一种基于SDR可重构多通道雷达发射机[J].应用科技,2018,45(03):23.[doi:10.11991/yykj.201703004]
 YUAN Binghua,ZHANG Wenxu,ZHONG Xiaokang,et al.Reconfigurable multi-channel radar transmitter based on SDR[J].Applied science and technology,2018,45(02):23.[doi:10.11991/yykj.201703004]

更新日期/Last Update: 2013-07-17